A continuing goal in integrated circuitry fabrication is to make ever smaller and closer packed circuit components. As integrated circuitry density has increased, there is often greater reduction in the horizontal dimension of circuit components as compared to the vertical dimension. In many instances, the vertical dimension has increased. As size decreases and density increases, there is a continuing challenge to provide sufficient conductive contact area between electrically coupled circuit components particularly where that coupling is through contacting surfaces that are substantially horizontal. For example, elevationally elongated conductive vias formed in contact/via openings are commonly used for electrically coupling circuit components that are at different elevations relative to one another.
Memory is one type of integrated circuitry commonly incorporating conductive vias. Integrated memory is fabricated in one or more arrays of individual memory cells. The memory cells might be volatile, semi-volatile, or nonvolatile. Nonvolatile memory cells can store data for extended periods of time in the absence of power. Nonvolatile memory is conventionally specified to be memory having a retention time of at least about 10 years. Volatile memory dissipates, and is therefore refreshed/rewritten to maintain data storage. Volatile memory may have a retention time of milliseconds or less. The memory cells are configured to retain or store memory in at least two different selectable states. In a binary system, the states are considered as either a “0” or a “1”. In other systems, at least some individual memory cells may be configured to store more than two levels or states of information.
The smallest and simplest memory cell will likely be comprised of two electrodes having a programmable material, and possibly a select device (such as a diode or ovonic threshold switch), received between them. Suitable programmable materials have two or more selectable memory states to enable storing of information by an individual memory cell. The reading of the cell comprises determination of which of the states the programmable material is in, and the writing of information to the cell places the programmable material in a predetermined state. Some programmable materials retain a memory state in the absence of refresh, and thus may be incorporated into nonvolatile memory cells.
Arrays of memory cells may comprise a plurality of access lines at one elevation and a plurality of sense lines at another elevation. Programmable material and a select device may be provided between such lines where they cross. Individual memory cells can be written to or read from by application of suitable voltage and/or current to the respective crossing access line and sense line. A conductive via may be provided to each access line and to each sense line to apply such voltage and/or current to the selected lines. Only one conductive via is commonly fabricated for each line, although multiple conductive vias may be provided to electrically couple to the same line. Regardless, a memory cell closest to a conductive via experiences less resistance to current flow than does, for example, a memory cell hundreds or thousands of memory cells down the particular conductive line from that conductive via. This can be problematic, particularly during certain write operations where, for example, a memory cell closest to the via receives too much current.